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lt1236ls8 1 1236ls8f typical a pplica t ion fea t ures descrip t ion precision, low noise, low pr ofle hermetic v oltage reference the lt ? 1236ls8 is a precision reference that combines low drift and noise with excellent long-term stability and high output accuracy. the reference output will both source and sink up to 10ma and remains very constant with input voltage variations. the hermetic package provides outstanding humidity and thermal hysteresis performance. the lt1236ls8 is only 5mm 5mm 1.5mm, offering an alternative to large through-hole metal can voltage references, such as the industry standard lt1021. the lt1236ls8 offers similar performance to the lt1236, with additional stability from the hermetic package. lt1236ls8 is based on a buried zener diode structure, which enables temperature and time stability, and extremely low noise performance of < 1ppm peak-to-peak. noise is 100% tested in production. the lt1236ls8 operates on a supply voltage from 7.2v up to 40v. the subsurface zener exhibits better time stability than even the best bandgap reference, and the hermetic package maintains that stability over a wide range of environmental conditions. l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. basic connection typical distribution of temperature drift a pplica t ions n hermetic 5mm 5mm lcc leadless chip carrier package: insensitive to humidity thermal hysteresis: 8ppm (0c to 70c) thermal hysteresis: 60ppm (C40c to 85c) n low drift: a-grade: 5ppm/c max b-grade: 10ppm/c max n high accuracy: a-grade: 0.05% max b-grade: 0.10% max n low noise: <1ppm peak-to-peak (0.1hz to 10hz) n 100% noise tested n sinks and sources 10ma n wide supply range to 40v n 8-pin (5mm 5mm) ls8 package n instrumentation and test equipment n high resolution data acquisition systems n a/d and d/a converters n precision regulators n precision scales n digital voltmeters lt1236ls8 out in gnd v out v in lt1236ls8 ta01 output drift (ppm/c) ?3 0 units (%) 4 8 12 16 24 22 ?2 ?1 0 1 lt1236ls8 ta02 2 3 20 18 14 10 6 2 distribution of three runs
lt1236ls8 2 1236ls8f a bsolu t e maxi m u m r a t ings input voltage ............................................................. 40v i nput/output voltage differential .............................. 35v t rim pin-to-ground voltage positive ................................................. equ al to v out negative .............................................................. C20v o utput short-circuit duration v in = 35v .......................................................... 10 se c v in 20v ..................................................... inde finite operating temperature range ................. C 4 0c to 85c storage temperature range .................. C6 5c to 150c (note 1) p in c on f igura t ion 1 2 3 nc* v in nc* 7 6 5 nc* v out trim** 4 gnd 8 nc* top view ls8 package 8-pin leadless chip carrier (5mm 5mm) connected internally. d0 not connect external circuitry to these pins see applications information section * ** t jmax = 125c, ja = 120c/w package lid is gnd o r d er i n f or m a t ion parameter conditions lt1236ls8-5 units min typ max output voltage (note 2) lt1236als8 lt1236bls8 4.9975 4.9950 5.000 5.000 5.0025 5.0050 v v output voltage temperature coefficient (note 3) lt1236als8 lt1236bls8 2 5 5 10 ppm/c ppm/c line regulation (note 4) 7.2v v in 10v 10v v in 40v l l 4 2 12 20 6 10 ppm/v ppm/v ppm/v ppm/v load regulation (sourcing current) (note 4) 0 i out 10ma l 15 25 40 ppm/ma ppm/ma e lec t rical c harac t eris t ics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v in = 10v, i out = 0, unless otherwise noted. lead free finish part marking* package description specified temperature range LT1236AILS8-5#pbf ? 12365 8-lead ceramic lcc 5mm 5mm C40c to 85c lt1236bils8-5#pbf ? 12365 8-lead ceramic lcc 5mm 5mm C40c to 85c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ ? this product is only offered in trays. for more information go to: http://www.linear.com/packaging/
lt1236ls8 3 1236ls8f parameter conditions lt1236ls8-5 units min typ max load regulation (sinking current) (note 4) 0 i out 10ma l 60 100 150 ppm/ma ppm/ma supply current l 0.8 1.2 1.5 ma ma output voltage noise (note 5) 0.1hz f 10hz 10hz f 1khz 3.0 2.2 3.5 v p-p v rms long-term stability of output voltage (note 6) ?t = 1000hrs non-cumulative 20 ppm temperature hysteresis of output (note 7) ?t = 25c ?t = 0c to 70c ?t = C40c to 85c 3 8 60 ppm ppm ppm e lec t rical c harac t eris t ics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v in = 10v, i out = 0, unless otherwise noted. note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: output voltage is measured immediately after turn-on. changes due to chip warm-up are typically less than 0.005%. note 3: temperature coefficient is measured by dividing the change in output voltage over the temperature range by the change in temperature. incremental slope is also measured at 25c. note 4: line and load regulation are measured on a pulse basis. output changes due to die temperature change must be taken into account separately. note 5: rms noise is measured with a 2-pole highpass filter at 10hz and a 2-pole lowpass filter at 1khz. the resulting output is full-wave rectified and then integrated for a fixed period, making the final reading an average as opposed to rms. correction factors are used to convert from average to rms, and 0.88 is used to correct for the non-ideal bandbass of the filters. peak-to-peak noise is measured with a single highpass filter at 0.1hz and a 2-pole lowpass filter at 10hz. the unit is enclosed in a still-air environment to eliminate thermocouple effects on the leads. test time is 10 seconds. note 6: long-term stability typically has a logarithmic characteristic and therefore, changes after 1000 hours tend to be much smaller than before that time. total drift in the second thousand hours is normally less than one third that of the first thousand hours, with a continuing trend toward reduced drift with time. significant improvement in long-term drift can be realized by preconditioning the ic with a 100-200 hour, 125c burn in. long term stability will also be affected by differential stresses between the ic and the board material created during board assembly. temperature cycling and baking of completed boards is often used to reduce these stresses in critical applications. note 7: hysteresis in output voltage is created by package stress that differs depending on whether the ic was previously at a higher or lower temperature. output voltage is always measured at 25c, but the ic is cycled to high or low temperature before successive measurements. hysteresis is roughly proportional to the square of temperature change. hysteresis is not normally a problem for operational temperature excursions, but can be significant in critical narrow temperature range applications where the instrument might be stored at high or low temperatures. hysteresis measurements are preconditioned by one temperature cycle.
lt1236ls8 4 1236ls8f typical p er f or m ance c harac t eris t ics start-up output voltage noise spectrum output voltage noise output voltage temperature drift load regulation ripple rejection ripple rejection input voltage (v) 0 85 rejection (db) 90 95 100 105 10 20 30 40 1236ls8 g01 110 115 5 15 25 35 f = 150hz time (s) 3 output voltage (v) 4 6 7 8 2 6 8 1236ls8 g03 5 0 4 10 12 14 v in = 0v to 12v bandwidth (hz) 10 8 rms noise (v) 12 16 14 10 6 2 100 1k 10k 1236ls8 g05 4 0 c out = 0 filter = 1 pole f low = 0.1hz frequency (hz) 10 90 rejection (db) 110 130 120 100 80 60 100 1k 10k 1236ls8 g02 70 50 v in = 15v c out = 0 temperature (c) ?40 5.000 output voltage (v) 5.002 5.005 0 40 60 1236ls8 g06 5.001 5.004 5.003 ?20 20 80 100 frequency (hz) 100 noise voltage (nv/hz) 200 250 350 400 10 1k 10k 1236ls8 g04 0 100 300 150 50 output current (ma) ?10 output change (mv) 1 3 5 4 2 0 ? 2 ? 4 6 1236ls8 g07 ? 1 ? 3 ? 5 ? 6? 8 ? 4 0 4 8 ? 2 2 10 v in = 8v sourcing sinking quiescent current sink mode current limit input voltage (v) 0 0 input current (ma) 0.2 0.6 0.8 1.0 3530 1.8 1236ls8 g08 0.4 5 10 15 20 25 40 1.2 1.4 1.6 t j = ? 55c t j = 25c t j = 125c i out = 0 output voltage (v) 0 0 current into output (ma) 10 30 40 50 4 8 10 18 1236ls8 g09 20 2 6 12 14 16 60 v in = 8v
lt1236ls8 5 1236ls8f typical p er f or m ance c harac t eris t ics load transient response, c load = 0 load transient response, c load = 1000pf output noise 0.1hz to 10hz thermal regulation time (s) output change (50mv/div) 2 1236ls8 g11 10 2 4 1 3 3 0 4 i source = 2-10ma i source = 0.5ma i sink = 0 i sink = 0.2ma i sink = 2-10ma 50mv 50mv ?i sink = 100a p-p ?i source = 100a p-p i source = 0 time (s) output change (20mv/div) 10 1236ls8 g12 50 10 20 5 15 15 0 20 i source = 2-10ma i source = 0.2ma i sink = 0 i sink = 0.2ma i sink = 2-10ma 20mv 20mv ?i sink = 100a p-p ?i source = 100a p-p i source = 0 time (ms) output change (mv) ? 1.0 ? 0.5 140 1236ls8 g10 20 60 100 0 0 40 80 120 load regulation thermal regulation* i load = 10ma *independent of temperature coefficient v in = 25v ?power = 200mw time (minutes) 0 3 5 1236ls8 g13 1 2 4 6 output voltage noise (5v/div) 5v (1ppm) filtering = 1 zero at origin 1 pole at 0.1hz 2 poles at 10hz
lt1236ls8 6 1236ls8f b lock diagra m d6 r1 r2 r3 r4 trim gnd 1236sl8 es q1 output ? + a1 input q2 d3 d4 d5 6.3v nc (pins 1, 3, 7, 8): connected internally, do not connect. v in (pin 2): power supply. bypass with 0.1f (or larger) capacitor to ground. gnd (pin 4): device ground. see applications information section for recommended connection methods. trim (pin 5): allows adjustment of output voltage. see applications information section for details. v out (pin 6): output voltage. see applications information section for details regarding dc and capacitive loading and stability. p in func t ions
lt1236ls8 7 1236ls8f a pplica t ions i n f or m a t ion effect of reference drift on system accuracy a large portion of the temperature drift error budget in many systems is the system reference voltage. this graph indicates the maximum temperature coefficient allowable if the reference is to contribute no more than 0.5lsb error to the overall system performance. the example shown is a 12-bit system designed to operate over a temperature range from 25c to 65c. assuming the system calibration is performed at 25c, the temperature span is 40c. it can be seen from the graph that the temperature coefficient of the reference must be no worse than 3ppm/c if it is to contribute less than 0.5lsb error. for this reason, the lt1236ls8 has been optimized for low drift. trimming output voltage the lt1236ls8 has an output voltage trim pin, but the temperature drift of the nominal 4v open circuit voltage at pin 5 is about C1.7mv/c. for the voltage trimming not to affect reference output temperature drift, the external trim voltage must track the voltage on the trim pin. input impedance of the trim pin is about 100k and attenua - tion to the output is 13:1. the technique shown below is suggested for trimming the output of the lt1236ls8 while maintaining minimum shift in output temperature coefficient. the r1/r2 ratio is chosen to minimize interac - tion of trimming and temperature drift shifts, so the exact values shown should be used. capacitive loading and transient response the lt1236ls8 is stable with all capacitive loads, but for optimum settling with load transients, output capacitance should be under 1000pf. the output stage of the reference is class ab with a fairly low idling current. this makes transient response worst-case at light load currents. because of internal current drain on the output, actual worst-case occurs at i load = 0. significantly better load transient response is obtained by moving slightly away from these points. see load transient response curves for details. in general, best transient response is obtained when the output is sourcing current. in critical applica - tions, a 10f solid tantalum capacitor with several ohms in series provides optimum output bypass. load regulation the lt1236ls8 is capable of driving 10ma to a load. the load regulation at the output of the lt1236ls8 is very good, with a change of less than 25ppm/ma when driving the load. however, the load current will cause a voltage drop in the connecting wire between the lt1236ls8 and the load. this ir drop is dependent on the resistance of the connecting wire and will appear as additional load regulation error. for example, 12 feet of #22 gauge wire or 1 foot of 0.025 inch printed circuit board trace will create 2mv loss at 10ma output current. this is equivalent to 1lsb in a 10v, 12-bit system. there are three approaches that will reduce this effect. first, limiting the distance between the lt1236ls8 and the load will reduce the trace length, and improve load regulation. second, use wider traces for the connections between the lt1236ls8 and the load to reduce ir drop. finally, temperature span (c) 10 maximum temperature coefficient for 0.5lsb error (ppm/c) 30 100 1236ls8 ai01 1.0 10 20 100 90 807060 50 40 8-bit 10-bit 12-bit 14-bit lt1236ls8 out in gnd trim r1 27k r2 50k 1n4148 v out 1236ls8 ai02 maximum allowable reference drift
lt1236ls8 8 1236ls8f a pplica t ions i n f or m a t ion lt1236ls8 out gnd in load r1 220 2n3906 r2* input ground return *optional?reduces current in output sense lead: r2 = 2.4k 1236ls8 ai04 lt1236ls8 out in gnd keep this line resistance low load + input ground return 1236ls8 ai03 use a star-ground method, with the lt1236ls8 ground tied directly to the load, rather than through a ground plane or other shared ground trace. this last method will reduce drop in the ground trace between the lt1236ls8 and the load. the ground wire in this case will carry only approximately 1ma, which is the ground current of the lt1236ls8, while the load return current will shunt to the system ground separate from the reference-to-load path. the following circuits show proper hook-up to minimize errors due to ground loops and line losses. losses in the output lead can be greatly reduced by adding a pnp boost transistor if load currents are 5ma or higher. r2 can be added to further reduce current in the output sense lead. effects of air movement on low frequency noise the lt1236ls8 has very low noise because of the buried zener used in its design. in the 0.1hz to 10hz band, peak- to-peak noise is about 0.5ppm of the dc output. to achieve this low noise, however, care must be taken to shield the reference from ambient air turbulence. air movement can create noise because of thermoelectric differences between ic package leads and printed circuit board materials and/or sockets. power dissipation in the reference, even though it rarely exceeds 20mw, is enough to cause small tempera - ture gradients in the package leads. variations in thermal resistance, caused by uneven air flow, create differential lead temperatures, thereby causing thermoelectric voltage noise at the output of the reference. series mode with boost transistor standard series mode long-term drift long-term drift cannot be extrapolated from accelerated high temperature testing. this erroneous technique gives drift numbers that are wildly optimistic. the only way long-term drift can be determined is to measure it over the time interval of interest. the lt1236ls8 long-term drift data was collected on 80 parts that were soldered into printed circuit boards similar to a real world application. the boards were then placed into a constant temperature oven with a t a = 35c, their outputs were scanned regularly and measured with an 8.5 digit dvm. typical long-term drift is illustrated in figure 1. figure 1. long-term drift hours 0 ppm 40 0 80 200 1236ls8 f01 ?40 ?80 ?200 ?160 160 ?120 120 500 1000 1500 2000 normalized to 10 hours due to system warm-up
lt1236ls8 9 1236ls8f a pplica t ions i n f or m a t ion figure 2b. hysteresis plot C40c to 85c figure 2a. hysteresis plot 0c to 70c distribution (ppm) ?120 0 number of units 5 15 25 ?80 ?40 40 80 120 0 35 10 20 30 1236ls8 f02b 25c to ?40c to 25c 25c to 85c to 25c distribution (ppm) number of units 20 18 50 16 14 12 10 ?50 ?10 90 ?30 10 70 30 2 4 6 8 0 22 1236ls8 f02a 25c to 0c to 25c 25c to 70c to 25c hysteresis thermal hysteresis is a measure of change of output volt - age as a result of temperature cycling. figure 2a and 2b illustrate the typical hysteresis based on data taken from the lt1236ls8. a proprietary design technique minimizes thermal hysteresis. ir reflow shift the mechanical stress of soldering a part to a board can cause the output voltage to shift. moreover, the heat of an ir reflow or convection soldering oven can also cause the output voltage to shift. the materials that make up a semiconductor device and its package have different rates of expansion and contraction. after a part undergoes the extreme heat of a lead-free ir reflow profile, like the one shown in figure 3, the output voltage shifts. after the device expands, due to the heat, and then contracts, the humidity sensitivity plastic mold compounds absorb moisture. with changes in relative humidity, plastic packaging materials change the amount of pressure they apply to the die inside, which can cause slight changes in the output of a voltage refer - ence, usually on the order of 100ppm. the ls8 package is hermetic, so it is not affected by humidity, and is therefore more stable in environments where humidity may be a concern. however, pc board material may absorb moisture and apply mechanical stress to the lt1236ls8. proper board materials and layout are essential. figure 3. lead-free reflow profile figure 4. output voltage shift due to ir reflow minutes 0 temperature (c) 150 225 8 1236ls8 f03 75 0 2 4 6 10 300 t = 150c t s = 190c t l = 217c t p = 260c 380s t p 30s t l 130s 40s 120s ramp down t s(max) = 200c ramp to 150c reflow shift (%) ?0.05 0 number of units 2 4 6 ?0.03 ?0.01 ?0.04 ?0.02 0.010 10 9 8 1 3 5 7 1236ls8 f04 1 reflow 3 reflow 24hr rest stresses on the die have changed position. this shift is similar, but more extreme than thermal hysteresis. experimental results of ir reflow shift are shown below in figure 4. these results show only shift due to reflow and not mechanical stress.
lt1236ls8 10 1236ls8f typical a pplica t ions lt1236ls8 out v + 9v gnd in 1236ls8 ta03 + 2n2905 5v at 100ma 2f solid tant r1 220 boosted output current with no current limit lt1236ls8 out gnd in 1236ls8 ta04 + 2n2905 5v at 100ma 2f solid tant d1* led v + 10v 8.2 r1 220 glows in current limit, do not omit * boosted output current with current limit handling higher load currents lt1236ls8 out gnd in 1236ls8 ta05 r l 30ma 10v r1* 169 v out 5v typical load current = 30ma select r1 to deliver typical load current. lt1236 will then source or sink as necessary to maintain proper output. do not remove load as output will be driven unregulated high. line regulation is degraded in this application *
lt1236ls8 11 1236ls8f typical a pplica t ions operating 5v reference from 5v supply lt1236ls8 out in gnd 1236ls8 ta06 + + 1n914 1n914 8.5v c2* 5f c1* 5f 5v reference 5v logic supply cmos logic gate** f in 2khz* for higher frequencies c1 and c2 may be decreased parallel gates for higher reference current loading * ** 2-pole lowpass filtered reference lt1236ls8 out in gnd 1236ls8 ta07 ? + r1 36k 1f mylar 0.5f mylar r2 36k lt1001 v in v in v ref ?v ref f = 10hz total noise 2v rms 1hz f 10khz
lt1236ls8 12 1236ls8f typical a pplica t ions v cc f o ref + ref ? sck busy in + in ? sdo cs ext 0.1f 4 13 5 6 12 1, 8, 9, 16 11 10 15 sdi 7 5v 10f 0.01f ltc2440 1236ls8 ta08 14 r2 10 in + r1 5k c2, c5 taiyo yuden jmk107bj105ma 4.7f 8v to 12v lt1236ls8 c2 1f c1 0.01f 1 / 2 ltc2051hv c5 1f r5 10 in ? r4 5k c4 0.01f 1 / 2 ltc2051hv + ? + ? high precision, high stability, differential measurement system
lt1236ls8 13 1236ls8f typical a pplica t ions use resistor arrays to provide precise matching in excitation amplifier c1 0.1f 15v 3 1 2 7 81 63 6 ? + ref + ref ? in + in ? gnd v cc 2 3 4 5 6 1236ls8 ta09 1 lt1236ls8 rn1 10k 22 10v 350 bridge two elements varying rn1 10k q1 2n3904 1/2 lt1112 c2 0.1f 15v ?5v ?15v ?15v 6 7 5 4 5 + ? rn1 10k rn1 is lt5400acms8e-1 q2, q3 2n3906 2 1/2 lt1112 rn1 10k 33 2 c3 47f c1 0.1f 5v 5v 8 4 20 20 + ltc2411/ ltc2411-1
lt1236ls8 14 1236ls8f 30 29 21 31 7 8 6 9 28 11 13 12 17 18 12 10 13 2 1 5 3 6 35 2 2 6 6 5 5 1 3 4 1 33 2 4 36 34 3 26 27 25 19 14 15 4 4 5 32 24 ref + ref ? ch0 ch1 ch2 ch3 com adcinb adcina outa ?ina outb ?inb cs sck sd0 sdi busy f o ext muouta muxoutb +ina +inb ltc2442 gnd gnd gnd v ? v cc v + in gnd out trim ? + 2.5v 5v c13 0.1f c8 0.1f x0 x1 y0 y1 z0 z1 inh x y z sdi cs sck a b c v cc v ee gnd 11 10 9 5v sdo r21 5k r22 1.8k 74hc4053 ?2.5v r1, r3, r4 are caddock t914 ?2.5v ?2.5v 1236sl8 ta10 5v ?2.5v 2.5v ?5v c15 4.7k c14 0.1f c17 0.1f c9 0.1f c10 0.1f r20 1k r1 40k r3 5k r4 5k r5 8.87k r10 7.5k r9 10k r6 30k 5v v in1 5v v in2 ?5v ltc2050hv lt1236ls8 ref + ref + ?2.5v ?2.5v ?2.5v mmbt3904 10v range precision measurement system typical a pplica t ions
lt1236ls8 15 1236ls8f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. p ackage descrip t ion please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. 7 8 1 3 4 2 2.00 ref r0.20 ref 6 5 7 8 6 5 1 2 3 4 4.20 0.10 4.20 sq 0.10 2.54 0.15 1.00 typ 0.64 typ ls8 0609 rev ? r0.20 ref 0.95 0.10 1.45 0.10 0.10 typ 0.70 typ 1 4 7 8 6 5 1.50 0.15 2.50 0.15 2.54 0.15 0.70 0.05 package outline 5.00 sq 0.15 5.00 sq 0.15 5.80 sq 0.15 apply solder mask to areas that are not soldered note: 1. all dimensions are in millimeters 2. drawing not to scale 3. dimensions package do not include plating burrs plating burrs, if present, shall not exceed 0.30mm on any side 4. plating?electo nickel min 1.25um, electro gold min 0.30um 5. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (see note 5) 2 3 ls8 package 8-pin leadless chip carrier (5mm 5mm) (reference ltc dwg # 05-08-1852 rev ?)
lt1236ls8 16 1236ls8f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com linear technology corporation 2012 lt 0812 ? printed in usa r ela t e d p ar t s typical a pplica t ion part number description comments lt1021 precision references for series or shunt operation in hermetic to-5, sop-8, dip-8 package 0.05% max initial error, 5ppm/c max drift, 1ppm peak-to-peak noise (0.1hz to 10hz), C55c to 125c (to-5) lt1236s8/ lt1236n8 low drift, low noise, 5v and 10v voltage reference in so8, and dip8 package 0.05% max initial error, 5ppm/c max drift, 1ppm peak-to-peak noise (0.1hz to 10hz), C40c to 85c ltc6652ls8 high precision, buffered voltage reference family in 5mm w 5mm hermetic qfn package 0.05% max initial error, 5ppm/c max drift, shutdown current <2a, C40c to 125c operation lt6654ls8 precision, low noise, high output drive voltage reference family in 5mm w 5mm hermetic qfn package 1.6ppm peak-to-peak noise (0.1hz to 10hz, sink/source 10ma, 5ppm/c max drift, C40c to 125c operation measure dc to daylight using the ltc2408 and lt1236ls8 1236sl8 ta11 ch0 ch1 ch2 ch3 ch4 ch5 ch6 ch7 9 10 11 12 13 14 15 17 8-channel mux gnd 1, 5, 6, 16, 18, 22, 27, 28 mpu serial data link microwire and spi compatable lt1236ls8 23 20 19, 25 21 24 csadc csmux clk d in sdo 26 f o 24-bit ? adc ltc2408 adcin muxout 7 4 3 2, 8 1f 5v v ref v cc ? + + 4 2 6 0v to 5v 100f internal osc selected for 60hz rejection + 10f 8v 5v ref electrometer input (ph, piezo) 5v guard ring dc voltmeter input 1mv to 1000v ?5v r3, 10k 5v max c1, 0.1f lt1793 3 2 6 4 7 + ? + 5v ?5v ltc1050 2 3 6 7 4 r4 1k r9 1k 1% + r7 10k, 0.1% r5 5k, 1% r8 100, 5% 3-wire r-pack r6 10k, 0.1% in914 in914 1f ac input 60hz 60hz?rf rf power r1 900k 0.1%, 1w, 1000 wvdc r2 4.7k 0.1% 50 r13 5k 0.1% 5v daylight hamamatsu photodiode s1336-5bk 100 pt rtd (3-wire) rt force sense infrared infrared thermocouple omega 0s36-01 v ref 5v 50 load bonded to rtd on insulated mounting r11 24.9k, 0.1% j1 j2 j3 v ref 5v thermistor 10k ntc local temp r12 24.9k, 0.1% r10 5k 1% ?60mv to 4v 2.7v at 0c 0.9v at 40c ?2.2mv to 16mv 0v to 4v 20mv to 80mv <1mv out in gnd

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